Schmitt trigger has a wide range of applications in digital and analog circuits, especially in the areas of anti-noise and waveform shaping, Schmitt trigger plays an irreplaceable role. Schmitt trigger exhibits dual flip-flop threshold characteristics in its direct current (DC) characteristics, for different flip-flop direction, the flip-flop threshold is different, specifically, when input signal changes from low electrical level to high electrical level, the flip-flop threshold is V+; when the input signal changes from high electrical level to low electrical level, the flip-flop threshold is V−. When the low electrical level signal inputted by Schmitt trigger has coupling noise, as long as the aggregate value of signal electrical level and noise electrical level does not exceed V+, the output state of the Schmitt trigger will not be changed; when the high electrical level signal inputted by Schmitt trigger has coupling noise, as long as the aggregate value of signal electrical level and noise electrical level is not lower than V−, the output state of the Schmitt trigger will not be changed either.
Thus, the filtering of noise signal is achieved, thus, results in the input and output waveforms as shown in FIG. 1A. As shown in FIG. 1B, when the input signal of Schmitt trigger is a triangular wave signal, because of its dual flip-flop threshold characteristics, the output signal becomes a square wave, so to achieve the integration from triangular wave signal to square wave signal. In digital circuits, if the transition between high electrical level and low electrical level of a certain signal is too slow, by using the Schmitt trigger to integrate it, a steep jump can be achieved, thus results in clear digital electrical level signal.
Conventional Schmitt trigger circuit implementation is as shown in FIG. 2, the transition from low electrical level to high electrical level of the electrical level of the input signal will enhance the source voltage of N-type metal oxide semiconductor (NMOS) transistor NM2; the transition from high electrical level to low electrical level of the input level will reduce the source voltage of P-type metal oxide semiconductor (PMOS) transistor PM2, thus achieving the dual flip-flop threshold characteristics. Since the pull-up unit and the pull-down unit each contain two metal oxide semiconductor (MOS) transistors connected in series, it is slower and also takes up more chip area.